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IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
FEATURES: DESCRIPTION:
IDT74ALVC16245
* 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * VCC = 2.5V 0.2V * CMOS power levels (0.4 W typ. static) * Rail-to-Rail output swing for increased noise margin * Available in SSOP, TSSOP, and TVSOP packages
This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The ALVC16245 has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
DRIVE FEATURES:
* High Output Drivers: 24mA * Suitable for heavy loads
APPLICATIONS:
* 3.3V high speed systems * 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
1D IR
1
2D IR
48
24 25 36 13 35
1O E 2A 1
2O E
1A 1
47 2 46
1B 1 2A 2
2B 1
1A 2
3 44 5 43 6 41 8 40 9 38 11
1B 2 2A 3 1B 3 2A 4 1B 4 2A 5 1B 5 2A 6 1B 6 2A 7 1B 7
26 27 29 30 32 33
14
2B 2
1A 3
16
2B 3
1A 4
17
2B 4
1A 5
19
2B 5
1A 6
20
2B 6
1A 7
22
2B 7
1A 8
37
2A 8
12
1B 8
23
2B 8
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
(c) 1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4604/1
IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1D IR 1B 1 1B 2
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max VTERM(2) Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VI > VCC Continuous Clamp Current, VO < 0 Continuous Current through each VCC or GND -0.5 to +4.6 -0.5 to VCC+0.5 -65 to +150 -50 to +50 50 -50 100
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE 1A 1 1A 2
Unit V V C mA mA mA mA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
VTERM(3) TSTG IOUT IIK IOK ICC ISS
GND
1B 3 1B 4
GND
1A 3 1A 4
VCC
1B 5 1B 6
VCC
1A 5 1A 6
GND
1B 7 1B 8 2B 1 2B 2
GND
1A 7 1A 8 2A 1 2A 2
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT COUT Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 5 7 7 Max. 7 9 9 Unit pF pF pF
GND
2B 3 2B 4
GND
2A 3 2A 4
NOTE: 1. As applicable to the device type.
VCC
2B 5 2B 6
VCC
2A 5 2A 6
PIN DESCRIPTION
Pin Names xOE xDIR xAx xBx Description Output Enable Inputs (Active LOW) Direction Control Inputs Side A Inputs or 3-State Outputs Side B Inputs or 3-State Outputs
GND
2B 7 2B 8 2D IR
GND
2A 7 2A 8 2OE
SSOP/ TSSOP/ TVSOP TOP VIEW
FUNCTION TABLE (EACH 8-BIT SECTION)(1)
Inputs xOE L L H
NOTE: 1. H = HIGH Voltage Level X = Don't Care L = LOW Voltage Level Z = High-Impedance
xDIR L H X
Outputs Bus B Data to Bus A Bus A Data to Bus B Z
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IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C
Symbol VIH VIL IIH IIL IOZH IOZL VIK VH ICCL ICCH ICCZ ICC Parameter Input HIGH Voltage Level Input LOW Voltage Level Input HIGH Current Input LOW Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC One input at VCC - 0.6V, other inputs at VCC or GND VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VCC = 3.6V VCC = 3.6V VI = VCC VI = GND VO = VCC VO = GND Test Conditions Min. 1.7 2 -- -- -- -- -- -- -- -- -- Typ.(1) -- -- -- -- -- -- -- -- -0.7 100 0.1 Max. -- -- 0.7 0.8 5 5 10 10 -1.2 -- 40 V mV A A A A V Unit V
Quiescent Power Supply Current Variation
--
--
750
A
NOTE: 1. Typical values are at VCC = 3.3V, +25C ambient.
OUTPUT DRIVE CHARACTERISTICS
Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V IOH = - 24mA IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 6mA IOH = - 12mA Min. VCC - 0.2 2 1.7 2.2 2.4 2 -- -- -- -- -- Max. -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 V Unit V
NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C.
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IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, TA = 25C
VCC = 2.5V 0.2V Symbol CPD CPD Parameter Power Dissipation Capacitance Outputs enabled Power Dissipation Capacitance Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical 22 4 VCC = 3.3V 0.3V Typical 29 5 Unit pF
SWITCHING CHARACTERISTICS(1)
VCC = 2.5V 0.2V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay xAx to xBx or xBx to xAx Output Enable Time xOE to xAx or xBx Output Disable Time xOE to xAx or xBx Output Skew(2) -- -- -- -- -- 500 ps 1 5.2 -- 4.6 1 4.1 ns 1 5.7 -- 5.4 1 4.4 ns Min. 1 Max. 3.7 -- VCC = 2.7V Min. Max. 3.6 VCC = 3.3V 0.3V Min. 1 Max. 3 Unit ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2. Skew between any two outputs of the same package and switching in the same direction.
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IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
VIH VT 0V VOH VT VOL VIH VT 0V
ALV C Link
TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS
Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50
VCC 500 Pulse Generator
(1, 2)
SAME PHASE INPU T TRAN SITION
VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30
Unit V V V mV mV pF
VLOAD Open GND
tPLH OU TPUT tPLH OPPOSITE PHASE INPU T TRAN SITION
tPHL
6 2.7 1.5 300 300 50
tPHL
Propagation Delay
ENABLE CON TROL IN PUT tPZL
DISABLE
VIN D .U .T.
VOUT
VIH VT 0V VLOAD/2 VOL + VLZ VOL VOH VOH - VHZ 0V
ALV C Link
tPLZ VLOAD/2 VT tPHZ VT 0V
RT
500 CL
ALVC Link
Test Circuit for All Outputs
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2ns; tR 2ns.
OUTPU T SW ITCH NOR MALLY CLO SED LOW tPZH OU TPUT SW ITCH NORMALLY O PE N H IGH
NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V
ALVC Link
Enable and Disable Times
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open
VIH INPU T VT 0V VOH OUTPUT 1 VT VOL VOH OUTPUT 2 tPLH2 tPHL2
ALVC Link
DATA INPUT TIMING INPU T ASYNC HRON OU S CON TROL SYNC HRON OU S CON TROL
tSU
tH
tREM
tSU
tH
Set-up, Hold, and Release Times
tPLH1
tPHL1
LOW -H IGH -LOW PULSE tW HIGH-LOW -HIGH PULSE
VT
tSK (x)
tSK (x)
VT
ALVC Link
VT VOL
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
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IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX ALVC X Bus-Hold Temp. Range XX Family XX XXX Device Type Package
PV PA PF 245
Shrink Small Outline Package Thin Shrink Small Outline Package Thin Very Small Outline Package 16-Bit Bus Transceiver with 3-State Outputs
16
Double-Density, 24mA
Blank 74
No Bus-Hold -40C to +85C
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for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com
for Tech Support: logichelp@idt.com (408) 654-6459
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